7013655P001

Technical Characteristics

• Case Outline Source And Designator

  -0-001-ag joint electron device engineering council

• Inclosure Configuration

  dual-in-line

• Voltage Rating And Type Per Characteristic

  5.5 volts maximum power source

• Output Logic Form

  transistor-transistor logic

• Bit Quantity (Non-Core)

  1024

• Time Rating Per Chacteristic

  75.00 nanoseconds maximum propagation delay time, low to high level output

• Test Data Document

  94117-7013655 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Maximum Power Dissipation Rating

  657.0 milliwatts

• Body Width

  0.245 inches minimum and 0.300 inches maximum

• Memory Capacity

  unknown

• Body Height

  0.120 inches minimum and 0.195 inches maximum

• Body Length

  0.750 inches minimum and 0.795 inches maximum

• Input Circuit Pattern

  10 input

• Terminal Type And Quantity

  16 printed circuit

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Memory Device Type

  rom

• Terminal Surface Treatment

  solder

• Inclosure Material

  ceramic and glass

• Operating Temp Range

  +0.0/+75.0 deg celsius

• Word Quantity (Non-Core)

  256

• Features Provided

  schottky and w/buffered output and w/decoded output and expandable and bipolar and hermetically sealed and monolithic and w/enable and high speed and programmable and programmed and w/open collector and w/disable