SN40552

Technical Characteristics

• Test Data Document

  10236-7100036 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Input Circuit Pattern

  quad 2 input

• Operating Temp Range

  +0.0/+70.0 deg celsius

• Body Width

  0.220 inches minimum and 0.280 inches maximum

• Time Rating Per Chacteristic

  22.00 nanoseconds maximum propagation delay time, low to high level output and 15.00 nanoseconds maximum propagation delay time, high to low level output

• Design Function And Quantity

  4 gate, nand

• Body Height

  0.140 inches minimum and 0.180 inches maximum

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Inclosure Material

  ceramic and glass

• Maximum Power Dissipation Rating

  40.0 milliwatts

• Body Length

  0.660 inches minimum and 0.785 inches maximum

• Inclosure Configuration

  dual-in-line

• Features Provided

  positive outputs and monolithic and hermetically sealed and w/totem pole output

• Case Outline Source And Designator

  t0-116 joint electron device engineering council

• Output Logic Form

  transistor-transistor logic