SN5473-1

Technical Characteristics

• Output Logic Form

  transistor-transistor logic

• Terminal Surface Treatment

  gold

• Design Function And Quantity

  2 flip-flop, j-k, master slave

• Inclosure Material

  ceramic and glass

• Body Width

  0.145 inches maximum

• Test Data Document

  96214-507869 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Time Rating Per Chacteristic

  50.00 nanoseconds maximum propagation delay time, low to high level output and 50.00 nanoseconds maximum propagation delay time, high to low level output

• Terminal Type And Quantity

  14 flat leads

• Body Height

  0.035 inches minimum and 0.050 inches maximum

• Maximum Power Dissipation Rating

  100.0 milliwatts

• Special Features

  formed leads

• Precious Material

  gold

• Features Provided

  positive outputs and w/enable and w/clear and hermetically sealed and monolithic

• Precious Material And Location

  terminal surface gold

• Body Length

  0.250 inches minimum and 0.260 inches maximum

• Inclosure Configuration

  flat pack

• Voltage Rating And Type Per Characteristic

  -1.5 volts minimum power source and 5.5 volts maximum power source

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Input Circuit Pattern

  dual 4 input