717310-040

Technical Characteristics

• Inclosure Material

  ceramic and glass

• Body Width

  0.160 inches minimum and 0.185 inches maximum

• Maximum Power Dissipation Rating

  45.0 milliwatts

• Case Outline Source And Designator

  t0-85 joint electron device engineering council

• Output Logic Form

  transistor-transistor logic

• Input Circuit Pattern

  triple 3 input

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Features Provided

  positive outputs and hermetically sealed and monolithic and medium speed

• Inclosure Configuration

  flat pack

• Voltage Rating And Type Per Characteristic

  -1.5 volts maximum power source and 5.5 volts maximum power source

• Design Function And Quantity

  3 gate, nand

• Terminal Type And Quantity

  14 flat leads

• Time Rating Per Chacteristic

  10.00 nanoseconds nominal propagation delay time, low to high level output

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Terminal Surface Treatment

  solder

• Body Length

  0.240 inches minimum and 0.275 inches maximum

• Body Height

  0.030 inches minimum and 0.070 inches maximum

• Test Data Document

  13499-351-7101 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)