CS300068-2

Technical Characteristics

• Design Function And Quantity

  1 flip-flop, clocked and 1 flip-flop, j-k, master slave

• Time Rating Per Chacteristic

  25.00 nanoseconds maximum propagation delay time, low to high level output and 40.00 nanoseconds maximum propagation delay time, high to low level output

• Output Logic Form

  transistor-transistor logic

• Case Outline Source And Designator

  t0-116 joint electron device engineering council

• Bit Quantity (Non-Core)

  4

• Inclosure Configuration

  dual-in-line

• Body Length

  0.660 inches minimum and 0.785 inches maximum

• Inclosure Material

  ceramic and glass

• Input Circuit Pattern

  9 input

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Body Height

  0.140 inches minimum and 0.180 inches maximum

• Test Data Document

  96906-mil-std-883 standard (includes industry or association standards, individual manufactureer standards, etc.).

• Body Width

  0.220 inches minimum and 0.280 inches maximum

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Features Provided

  presettable and positive outputs and edge triggered and hermetically sealed and monolithic and w/clear and w/enable