CD282ET

Technical Characteristics

• Output Logic Form

  transistor-transistor logic

• Case Outline Source And Designator

  t0-116 joint electron device engineering council

• Design Function And Quantity

  1 counter, binary, up/down

• Bit Quantity (Non-Core)

  4

• Inclosure Configuration

  dual-in-line

• Body Length

  0.660 inches minimum and 0.785 inches maximum

• Inclosure Material

  ceramic and glass

• Maximum Power Dissipation Rating

  325.0 milliwatts

• Features Provided

  w/clear and presettable and synchronous and hermetically sealed and monolithic and w/enable and programmable

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Body Height

  0.140 inches minimum and 0.180 inches maximum

• Test Data Document

  80063-sm-b-586418 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Body Width

  0.220 inches minimum and 0.280 inches maximum

• Input Circuit Pattern

  8 input

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Time Rating Per Chacteristic

  38.00 nanoseconds maximum propagation delay time, low to high level output and 47.00 nanoseconds maximum propagation delay time, high to low level output