SF60-12

Technical Characteristics

• Case Outline Source And Designator

  t0-116 joint electron device engineering council

• Output Logic Form

  transistor-transistor logic

• Test Data Document

  08241-1700-2676 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Voltage Rating And Type Per Characteristic

  5.5 volts maximum power source

• Inclosure Configuration

  dual-in-line

• Body Length

  0.660 inches minimum and 0.785 inches maximum

• Design Function And Quantity

  1 flip-flop, j-k, and/or input

• Inclosure Material

  ceramic and glass

• Terminal Surface Treatment

  solder

• Input Circuit Pattern

  10 input

• Maximum Power Dissipation Rating

  60.0 milliwatts

• Body Height

  0.140 inches minimum and 0.180 inches maximum

• Time Rating Per Chacteristic

  25.00 nanoseconds nominal propagation delay time, low to high level output and 13.00 nanoseconds nominal propagation delay time, high to low level output

• Body Width

  0.220 inches minimum and 0.280 inches maximum

• Storage Temp Range

  -65.0/+200.0 deg celsius

• Terminal Type And Quantity

  14 printed circuit

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Features Provided

  hermetically sealed and monolithic and negative edge triggered and w/enable and positive outputs