8001800026

Technical Characteristics

• Test Data Document

  14715-8001800026 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Case Outline Source And Designator

  t0-84 joint electron device engineering council

• Terminal Surface Treatment

  gold

• Output Logic Form

  transistor-transistor logic

• Time Rating Per Chacteristic

  45.00 nanoseconds maximum propagation delay time, low to high level output and 15.00 nanoseconds maximum propagation delay time, high to low level output

• Features Provided

  hermetically sealed and positive outputs and medium speed and monolithic and w/open collector

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Voltage Rating And Type Per Characteristic

  -1.5 volts minimum power source and 5.5 volts maximum power source

• Body Width

  0.120 inches minimum and 0.150 inches maximum

• Inclosure Configuration

  flat pack

• Precious Material And Location

  terminal surface gold

• Input Circuit Pattern

  quad 2 input

• Precious Material

  gold

• Terminal Type And Quantity

  14 flat leads

• Design Function And Quantity

  4 gate, nand

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Body Length

  0.240 inches minimum and 0.260 inches maximum

• Body Height

  0.030 inches minimum and 0.070 inches maximum

• Inclosure Material

  ceramic and glass

• Maximum Power Dissipation Rating

  40.0 milliwatts