54LS112

Technical Characteristics

• Output Logic Form

  transistor-transistor logic

• Time Rating Per Chacteristic

  20.00 nanoseconds maximum propagation delay time, low to high level output and 30.00 nanoseconds maximum propagation delay time, high to low level output

• Voltage Rating And Type Per Characteristic

  5.5 volts maximum power source

• Features Provided

  low power and burn in and hermetically sealed and schottky and w/clock and negative edge triggered and w/clear

• Terminal Type And Quantity

  16 flat leads

• Body Height

  0.050 inches minimum and 0.080 inches maximum

• Terminal Surface Treatment

  solder

• Inclosure Material

  ceramic

• Input Circuit Pattern

  dual 5 input

• Design Function And Quantity

  2 flip-flop, j-k, clocked

• Body Length

  0.371 inches minimum and 0.400 inches maximum

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Test Data Document

  03640-6086593 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Body Width

  0.285 inches maximum

• Inclosure Configuration

  flat pack

• Operating Temp Range

  -55.0/+125.0 deg celsius