EP1810JM883B

Technical Characteristics

• Part Name Assigned By Controlling Agency

  macrocell logic array

• Maximum Power Dissipation Rating

  1.5 watts

• Overall Height

  0.085 inches minimum and 0.190 inches maximum

• Memory Device Type

  pal

• Inclosure Configuration

  leaded chip carrier

• Overall Length

  0.975 inches minimum and 1.000 inches maximum

• Body Width

  0.940 inches minimum and 0.960 inches maximum

• Test Data Document

  96906-mil-std-883 standard (includes industry or association standards, individual manufactureer standards, etc.).

• Output Logic Form

  complementary-metal oxide-semiconductor logic

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Overall Width

  0.975 inches minimum and 1.000 inches maximum

• Inclosure Material

  ceramic

• Terminal Surface Treatment

  solder

• Body Length

  0.940 inches minimum and 0.960 inches maximum

• Input Circuit Pattern

  32 input and 32 input

• Operating Temp Range

  -65.0/+135.0 deg celsius

• Body Height

  0.075 inches minimum and 0.155 inches maximum

• Voltage Rating And Type Per Characteristic

  -2.0 volts minimum power source and 7.0 volts maximum power source

• Features Provided

  programmable and erasable and electrostatic sensitive and tested to mil-std-883 and monolithic and bidirectional

• Terminal Type And Quantity

  68 j-hook